This invention relates to a phase-locked circuit for phase-locking a clock signal used in converting an analog input signal such as a composite color television signal into a digital signal to a reference phase signal component included in the analog input signal.
Recently, high-speed analog-digital (A/D) converters and digital-analog (D/A) converters have become easily available, and there have been proposed various systems for digitally processing composite color television signals such as NTSC signals. For example, there is provided a digital decoder for separating an NTSC signal into a luminance signal and two chrominance signals or into three primary color signals.
In the digital decoder of this type, the sampling rate of a clock signal to be supplied as a sampling signal to an A/D converter for converting NTSC signals into digital signals should be set to correspond to an integral multiple (for example, triple or quadruple) or a rational multiple of the frequency of a color sub-carrier. Conventionally, there has been used such a phase-locked circuit as shown in FIG. 1 to obtain a sampling clock signal having the same frequency as and synchronized with the color sub-carrier.
The prior art phase-locked circuit shown in FIG. 1 is intended to control the phase of a sampling clock signal for driving an A/D converter 10 which converts an NTSC signal supplied to an input terminal 12 into a digital signal and supplies the digital output signal to an external circuit (not shown) through an output terminal 14, and is provided with a synchronizing signal separator circuit 16 and a burst separator circuit 18 which are connected to receive the input NTSC signal. After receiving the NTSC signal, the synchronizing signal separator circuit 16 supplies the burst separator circuit 18 with a synchronizing signal component extracted thereby from the NTSC signal. In response to the synchronizing signal component from the synchronizing signal separator circuit 16, the burst separator circuit 18 extracts a color burst signal from the color sub-carrier or NTSC signal, and supplies the color burst signal to a phase comparator 20. The phase comparator 20 compares the color burst signal from the burst separator circuit 18 with an output signal, having frequency equal to that of the color sub-carrier, from a frequency divider 22 for dividing the frequency of an output signal from a voltage controlled oscillator 24 having the center frequency at the integral multiple of that of the color sub-carrier, and produces an output voltage corresponding to the phase difference between both these input signals. The output voltage from the phase comparator 20 is supplied to a control terminal of the voltage controlled oscillator 24 through a loop filter 26. Thus, an output signal from the voltage controlled oscillator 24 is phase-locked to the color sub-carrier. The output signal of the voltage controlled oscillator 24 is also supplied to a phase shifter 28, where it is phase-shifted so as to have a phase required for color separation or the like, and then supplied as a sampling clock signal to the A/D converter 12. Thus, in response to the sampling clock signal phase-locked to the color sub-carrier, the A/D converter 10 converts the input NTSC signal into a digital signal.
In the circuit shown in FIG. 1, the phase comparator 20, frequency divider 22, voltage controlled oscillator 24, and loop filter 26 constitute a phase-locked loop in which the output signals of the voltage controlled oscillator 24 and the burst separator circuit 18 may be phase-locked to each other. Therefore, the difference between the phase of the clock signal at a point of time when it is actually sampled inside the A/D converter 10 and the phase of the color burst signal of the color sub-carrier in the NTSC signal includes the sum of the respective phase shifts of the burst separator circuit 18 and phase shifter 28 as well as an aperture delay of the A/D converter 10. That is, the stability of the phase difference between the color burst signal as the reference phase signal and the sampling clock pulse signal depends on the operating stability of the burst separator circuit 18 and phase shifter 28 and the aperture delay of the A/D converter 10, so that it is necessary to use a burst separator circuit and a phase shifter capable of stable operation with high accuracy, as well as an A/D converter with small-variation in aperture delay, in order to obtain a stable clock signal phase-locked to the color sub-carrier.